System and Method for Protecting Data Stored in the Control Registers of an Integrated Circuit

ABSTRACT

The present invention provides a system and method for protecting data stored in the control registers of an integrated circuit, such as a television chip. The system and method use one or more selectively activated read protection modules to prevent the control registers from being read unless a predetermined key or password is entered. The password or key may be stored in password registers within the chip. A key access generator will enable read access of the control registers if correct values are written to the appropriate password registers. The key access generator may enable read access for a predetermined period of time or until it receives another input.

FIELD OF THE INVENTION

The present invention relates to integrated circuits and moreparticularly, to a system and method for protecting data stored in thecontrol registers of an integrated circuit, such as a television chip.

BACKGROUND OF THE INVENTION

Television systems typically include integrated circuits or “televisionchips” that perform various image and audio processing functions. Atelevision chip may include several functional blocks or modules thateach perform a corresponding function. Each functional block or modulemay be associated with one or more control registers that include dataused by the module to manage and control the performance of thecorresponding function. Based on the settings of these registers,television manufacturers can achieve different image and/or soundquality. Manufacturers of top-tier televisions may invest significanttime and resources to determine the best settings for these registers toprovide excellent picture quality and/or audio performance. As a result,manufacturers providing these top-tier televisions may have moreexpertise in tuning these registers and thus achieve a better overallpicture quality based on their proprietary register settings. Othertelevision manufacturers do not have similar expertise in fine tuningthese registers for optimal picture quality. However, certainmanufacturers have been known to obtain top-tier television systems andread the proprietary register settings from the television chips. Thesemanufacturers can then use the settings to program similar televisionchips that may be used in their own television systems.

For at least these reasons, it would be desirable to provide a systemand method for protecting the data stored in the control registers oftelevision chips.

SUMMARY OF THE INVENTION

The present invention provides a system and method for protecting datastored in the control registers of an integrated circuit, such as atelevision chip.

In one non-limiting embodiment, the system and method use one or moreselectively activated read protection modules to prevent controlregisters on an integrated circuit from being read unless apredetermined key or password is inputted. The password or key may bestored in password registers within the chip. A key access generatorwill enable read access of the control registers if correct values arewritten to the associated password registers. The key access generatormay enable read access for a predetermined period of time or until itreceives another input.

One non-limiting advantage of the present invention is that allowscompanies that use television chips to selectively protect proprietarycontrol register settings.

Another non-limiting advantage of the present invention is that itprovides separate and independent read protection for serial port accessand parallel port access of control registers.

Another non-limiting advantage of the present invention is that itallows users to selectively enter and modify their own passwords forread access of control registers.

According to one non-limiting aspect of the present invention, a systemfor protecting data stored within control registers of an integratedcircuit is provided. The system includes a read protection circuit thatselectively prevents data from being read from the control registersunless a predetermined key is inputted into the read protection circuit.

According to another non-limiting aspect of the present invention, atelevision chip is provided. The television chip includes a plurality offunctional modules that perform processing functions; a plurality ofcontrol registers that are associated with the functional modules andthat store data used by the modules to control performance of processingfunctions; one or more ports for communicating with the television chip;one or more read protection modules that are operatively disposedbetween the control registers and the one or more ports, and that whenactivated, prevent data from being read from the control registers byuse of the one or more ports; and a key access generator that receivesinput values, compares the input values to one or more predeterminedkeys, and, if the input values are equal to one or more predeterminedkeys, disables one or more read protection blocks to allow the datastored in the control registers to be read by use of the one or moreports.

According to another non-limiting aspect of the present invention, amethod for protecting data stored on control registers in a televisionchip is provided. The method includes selectively preventing data frombeing read from the control registers by use of a port unless apredetermined key is inputted into the port. In one embodiment,selectively preventing data from being read from the control registersmay include receiving input values from the port; comparing the inputvalues to the predetermined key; and if the input values are equal tothe at least one predetermined key, enabling read access to the datastored in the control registers through the port.

These and other features and advantages of the invention will becomeapparent by reference to the following specification and by reference tothe following drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of a television chip employing a system andmethod for protecting data stored in the control registers of the chip,according to one embodiment of the present invention.

FIG. 2 is a block diagram illustrating one embodiment of a system forprotecting data stored in the control registers of a television chip,according to the present invention.

FIG. 3 illustrates one embodiment of a read protection module, accordingto the present invention.

DETAILED DESCRIPTION OF THE EMBODIMENTS

The present invention will now be described in detail with reference tothe drawings, which are provided as illustrative examples of theinvention so as to enable those skilled in the art to practice theinvention. Notably, the implementation of certain elements of thepresent invention may be accomplished using software, hardware, firmwareor any combination thereof, as would be apparent to those of ordinaryskill in the art, and the figures and examples below are not meant tolimit the scope of the present invention. Moreover, where certainelements of the present invention can be partially or fully implementedusing known components, only those portions of such known componentsthat are necessary for an understanding of the present invention will bedescribed, and detailed descriptions of other portions of such knowncomponents will be omitted so as not to obscure the invention. Preferredembodiments of the present invention are illustrated in the Figures,like numerals being used to refer to like and corresponding parts ofvarious drawings.

FIG. 1 illustrates a block diagram of a television chip 100 employing asystem and method for protecting data stored in control registers,according to one embodiment of the present invention. While theembodiment disclosed relates to a television chip, it should beappreciated that the invention may be implemented in any type ofintegrated circuit having control registers with stored data.

Television chip 100 may be an integrated circuit including severalfunctional blocks or modules 110 that perform various image and/or audioprocessing functions (e.g., chrominance processing, luminanceprocessing, de-interlacing, motion adaptive processing, sharpnesscontrol, digital noise reduction image processing, scaling, and thelike). Each module 110 is associated with one or more control registers120 that include data used by the module to manage and control theperformance of the module's corresponding function. Chip 100 includes apassword protection block or circuit 130 that prevents unauthorizedreading of data from control registers 120. A microcontroller or centralprocessing unit (CPU) 140 may be operatively coupled to television chip100 by way of a serial (e.g., I²C) port 150 and a parallel port 160. Inone embodiment, a conventional memory unit 170, such as a DRAM unit, mayalso be coupled to chip 100.

Chip 100 may be operatively disposed in a digital television system.Chip 100 receives video and audio input, processes that input andprovides video output that may be communicated to a monitor or display,and audio output that may be communicated to a sound system. Videooutput may be in analog or digital format. Although only a single videoinput and video output is shown in FIG. 1, it should be appreciated thatmultiple video and audio inputs and outputs may be communicated to andfrom chip 100. Furthermore, television chip 100 may receive, demodulateand process inputs having combined video and audio data.

FIG. 2 illustrates one embodiment of a password protection system 130for read protecting data in control registers 120, according to thepresent invention. While the following discussion relates to a system130, it should be appreciated that each of the portions or blocksillustrated in FIG. 2 (as well as the other Figures) may represent logicsteps or processes performed according to an inventive method.Conventional hardware, software and/or firmware may be used to performthe logic steps and/or processes. It should further be appreciated thatsuch logic steps or processes can be implemented as computer-executableinstructions stored on a computer readable medium.

Password protection system 130 may include read protection modules orblocks 132, 134 and a key access generator 136, which is communicativelycoupled to blocks 132, 134 and to the serial port and parallel port.Read protection block 132 is coupled to the serial (I²C) port and isoperatively disposed between the CPU 140 and control registers 120. Readprotection block 134 is coupled to the parallel port and is operativelydisposed between the CPU 140 and the control registers 120. Readprotection blocks 132, 134 are coupled to multiplexer 138, which mayselect between the signals generated from each block, and communicatethe signals to control registers 120-1 through 120-N.

Read protection blocks 132, 134 may be formed from conventional circuitcomponents and may be designed to communicate a read signal from CPU 140to the control registers 120 only if key access generator 136 hasprovided a read enable signal. FIG. 3 illustrates one embodiment of aread protection block that may be used in the present invention. Asshown, the read protection block may be formed from an AND gate. Theinputs to the AND gate are the read signal from CPU 140 (by way of theserial or parallel port) and the read enable signal from key accessgenerator 136. The output of the read protection block will not beactivated (e.g., “1”) unless both the read signal and read enable signalare activated (e.g., “1”).

Registers 120-1 through 120-N are communicatively coupled to amultiplexer 142. Upon receipt of a read signal (e.g., an active “1”signal from multiplexer 138), control registers 120-1 through 120-Ncommunicate their respectively stored data to multiplexer 142, whichcommunicates the data to a data bus that provides a channel fortransferring register values external to chip 100.

Key access generator 136 may be formed from conventional circuitcomponents and may be designed to generate the read enable signal onlyif a correct protection key or password is written to the generator 136,e.g., by way of the serial or parallel port. In one embodiment, theprotection key may be a set of selected on-chip register settingswritten through the serial port or parallel port, e.g., a predeterminedset of values written to a predetermined set of registers. The passwordregisters may be located within the key access generator module 136 orcommunicatively coupled to the module. The correct key values must bewritten to the correct registers before any read access to controlregisters 120 is allowed (e.g., before the read enable signal isgenerated). In one embodiment, a different protection key (e.g.,different values to different registers) may be used for serial portaccess and for parallel port access. In one embodiment, the key accessgenerator 136 generates the read enable signal for a predeterminedperiod of time after receiving the correct key or password. In anotherembodiment, the key access generator 136 generates the read enablesignal until it receives another input written from the serial orparallel port.

In operation, a user or developer can read the current values out of thecontrol registers 120 by entering the correct key or password. In oneembodiment, the user inputs the correct values to the assigned passwordregisters by use of the CPU 140, either through the serial port orparallel port. Key access generator 136 receives these values andcompares them to the correct values, which may be stored in key accessgenerator 136. If key access generator 136 determines that the key iscorrect, it will enable read access by generating the read enablesignal. The correct key may be provided to the user by the supplier ormanufacturer of the television chip 100. In one embodiment, the serialport and parallel port use different and independent keys. Activatingthe serial port key will only allow read access through the serial port,and activating the parallel port key will only allow read access throughthe parallel port. Once read access has been enabled, the CPU 140 cancommunicate a read signal from the correct (i.e., enabled) port tocontrol registers 120, through the corresponding read protection block132 or 134 and multiplexer 138. The read signal causes the data inregisters 120-1 through 120-N to be outputted to multiplexer 142, whichplaces the data onto a data bus where it can be transmitted and read.

Once a user has read the data from control registers 120 and/or writtennew data into control registers 120, the read protection function may beactivated to protect the data. In one embodiment, the read protectionfunction may be activated by writing an input, such as an incorrect key,into the key access generator 136. Upon receiving the input, key accessgenerator 136 will disable the read enable signal (e.g., set read enableto “0”) until a correct key or password is entered again. In anotherembodiment, the read protection function may be activated by use of aninternal timer. That is, the key access generator will automaticallydisable the read enable signal (e.g., set read enable to “0”), after apredetermined period of time has expired after the correct key wasentered. In other embodiments, different ways may be used to activateand deactivate read access.

In one embodiment, a user can set a new key or password by inputting apredetermined sequence of values into the key access generator 136 afterentering a correct key. When the key access generator 136 detects thepredetermined sequence of values it enters into a wait state where itwaits for new key values to be received (e.g., through the serial portor parallel port). Once the key access generator 136 receives the newvalues, it sets the respective password (serial or parallel) equal tothe new values.

From the foregoing, it should be apparent that the present inventionprovides an improved system and method for read protecting datacontained in the control registers of an integrated circuit such as atelevision chip.

While the foregoing has been with reference to particular embodiments ofthe invention, it will be appreciated by those skilled in the art thatchanges in these embodiments may be made without departing from theprinciples and spirit of the invention, the scope of which is defined bythe appended claims.

What is claimed is: 1-28. (canceled)
 29. A system, comprising: a serialport; a parallel port; a control register configured to store aperformance parameter; a video processor configured to adjust a displaypicture quality according to the performance parameter; and a readprotection circuit configured to allow the video processor to access theperformance parameter and simultaneously prevent the performanceparameter from being read via one or both of the serial port and theparallel port, wherein access to the performance parameter via theserial port is selectably enabled and independent of whether access tothe performance parameter via the parallel port is enabled.
 30. Thesystem of claim 29, wherein the system comprises a transmitterconfigured to communicate a plurality of video outputs, wherein a firstvideo output of the plurality of video outputs is in an analog formatand a second video output of the plurality of video outputs is in adigital format.
 31. The system of claim 30, wherein the transmitter isconfigured to communicate a plurality of audio outputs.
 32. The systemof claim 29, wherein the read protection circuit comprises a key accessgenerator that is configured to: receive input values; compare the inputvalues to a predetermined key; and if the input values are equal to thepredetermined key, disable the read protection circuit and allow thedata stored in the control register to be read, and wherein the readprotection circuit comprises an AND gate, and wherein an input to theAND gate is an output from the key access generator and another input tothe AND gate is a read signal.
 33. The system of claim 32, wherein thepredetermined key comprises a predetermined set of values written to thecontrol register.
 34. The system of claim 29, wherein the readprotection circuit is configured to lock access to the control register.35. The system of claim 29, wherein the read protection circuit isconfigured to unlock access to the control register and allow the videoprocessor to control changes to the performance parameter.
 36. A system,comprising: a central processing unit (CPU); and a digital televisionchip operable to prevent unauthorized access to a performance parameter,wherein the digital television chip comprises: an audio processorconfigured to customize an audio quality according to the performanceparameter; a control register configured to store the performanceparameter; and a read protection circuit configured to prevent theperformance parameter from being read out of the control register by theCPU, wherein the read protection circuit is configured to prevent theperformance parameter from being read out of the control register to aport while simultaneously allowing the performance parameter to be readout of the control register to the audio processor, and wherein the readprotection circuit comprises a serial port and a parallel port, andwherein access to the performance parameter via the serial port isselectably enabled and independent of whether access to the performanceparameter via the parallel port is enabled.
 37. The system of claim 36,wherein the read protection circuit comprises a key access generatorthat is configured to: receive input values, compare the input values toa predetermined key; and if the input values are equal to thepredetermined key, disable the read protection circuit and allow theperformance parameter stored in the control register to be read.
 38. Thesystem of claim 37, wherein the read protection circuit is configured toprevent access to the control register.
 39. The system of claim 38,wherein the read protection circuit is configured to allow the controlregister to be changed.
 40. The system of claim 37, wherein thepredetermined key comprises a predetermined set of values written to thecontrol register.
 41. A method, the method comprising: storing aperformance parameter in a control register; adjusting a display picturequality, via a video processor, according to the performance parameter;allowing the video processor to access the performance parameter whilesimultaneously preventing the performance parameter from being read viaone or both of a serial port and a parallel port; and selectablyenabling access to the performance parameter via the serial portindependently of whether access to the performance parameter via theparallel port is enabled.
 42. The method of claim 41, wherein the methodcomprises communicating a plurality of video outputs, wherein a firstvideo output of the plurality of video outputs is in an analog formatand a second video output of the plurality of video outputs is in adigital format.
 43. The method of claim 41, wherein the methodcomprises: receiving input values; comparing the input values to apredetermined key; and if the input values are equal to thepredetermined key, disabling the read protection circuit and allow thedata stored in the control register to be read, and wherein the readprotection circuit comprises an AND gate, and wherein an input to theAND gate is an output from a key access generator and another input tothe AND gate is a read signal.
 44. The method of claim 41, wherein themethod comprises locking access to the control register.
 45. The methodof claim 41, wherein the method comprises unlocking access to thecontrol register; and allowing the video processor to control changes tothe performance parameter.
 46. The method of claim 41, wherein methodcomprises writing a predetermined key to the control register.
 47. Themethod of claim 41, wherein method is performed in a televisionintegrated circuit.
 48. The method of claim 41, wherein the videoprocessor is operable to process audio.